FPGA motor-control design kit
SmartFusion2 SoC FPGA device layout Microsemi is selling its SmartFusion2 SoC FPGA dual-axis motor control kit with a modular motor control IP suite and reference design for $599 for a limited period....
View ArticleAltera’s Spectra-Q accelerates design
Altera’s Spectra-Q software aims to accelerate design time for its Quartus II software for programmable devices. Spectra-Q has faster algorithms and allows for incremental design changes without...
View ArticleIntel, eASIC to produce customised Xeon-based SoCs
Intel and eASIC are to work together to deliver customised SoCs based on Xeon processors for datacentres and cloud computing. Demand has grown for customised chips that make a particular application or...
View ArticleUltraScale FPGA board scales to 600 million gates
Pro Design has come up with a kit for prototyping Xilinx Virtex UltraScale XCVU440 FPGAs and will demonstrate it at next month’s Design Automation Conference (DAC) in San Francisco. Scalable from 1 up...
View ArticleAltera returns to its FPGA roots with Stratix 10
Stratix 10 Altera has returned to its roots with its latest Stratix 10 FPGA family. The performance figures of this device are certainly impressive. It reminds me of the days when FPGAs were only...
View ArticleFPGA-based USB3 video bridge can repair the PC-HDMI disconnect
USB3 video bridge There’s now a simple solution for overcoming the incompatibilities between the USB3 I/O channels commonly used in today’s PCs and the digital media interfaces, such as High-Definition...
View ArticleFPGA flash storage good for the cloud, says Altera
FPGA flash storage good for the cloud, says Altera Altera says you can double the life of NAND flash storage by implementing an FPGA-based solid-state disk (SSD) controller running NAND optimisation...
View ArticleOpen source virtual reality headset uses ARM-based SoC
OSVR – A development kit for designing a virtual reality headset for game-players from 0pen-source software has been introduced by the Open-Source Virtual Reality Consortium A development kit for...
View ArticleADI launches clock jitter attenuator for base-stations
Today ADI introduced a clock jitter attenuator designed to support the JESD204B serial interface standard for connecting high-speed data converters and FPGAs operating in base station designs. The...
View ArticleFlex Logix adds RAM and DSP blocks to FPGA IP
Flex Logix is offering evaluation licences to SoC designers for block RAM and DSP cores which can be added to its embedded FPGA fabric. Flex Logix’ technology allows system-on-chip SoC designers to...
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